Speaker
Description
Many of the quantum algorithms that make theoretical guarantees on computational speedups are well beyond the capabilities of currently existing noisy intermediate-scale quantum (NISQ) hardware. The requisite resources (qubits, quantum gates) demands of these algorithms make their implementation impractical on such hardware. For some algorithms, various approaches exist to reduce these demands. We consider one such approach here. This approach uses relative phase Toffoli gates, advantageous over regular Toffoli gates due to their smaller circuit size. As a proof-of-concept demonstration of the utility of relative phase Toffoli gates, we have used a configuration of these gates in constructing the compiled quantum phase estimation routine to achieve a complete factoring of $N=21$. This demonstration builds on the demonstration of Martín-López et al. in Nature Photonics 6, 773 (2012) and going beyond this work by improving the accuracy of the algorithmic output by a further bit, which is necessary for the complete factorization of $N=21$. We implemented the algorithm on IBM quantum processors using only $5$ qubits. The use of relative phase Toffoli gates as demonstrated and characterized here may be useful in carrying out Shor's algorithm for larger integers, or other algorithms in systems with a limited number of noisy qubits.
Level for award;(Hons, MSc, PhD, N/A)?
MSc
Apply to be considered for a student ; award (Yes / No)?
Yes
