7-11 July 2014
Africa/Johannesburg timezone
<a href="http://events.saip.org.za/internalPage.py?pageId=16&confId=34"><font color=#0000ff>SAIP2014 Proceedings published on 17 April 2015</font></a>

Firmware development for the upgrade of the Tile Calorimeter of the ATLAS detector

8 Jul 2014, 17:10
1h 50m
D Ring ground level

D Ring ground level

Board: B.83
Poster Presentation Track B - Nuclear, Particle and Radiation Physics Poster1


Mr Chamunorwa Oscar Kureba (University of the Witwatersrand)

Abstract content <br> &nbsp; (Max 300 words)<br><a href="http://events.saip.org.za/getFile.py/access?resId=0&materialId=0&confId=34" target="_blank">Formatting &<br>Special chars</a>

At CERN, the European Organization for Nuclear Research, the fundamental structure of the universe is being probed by scientists and engineers. The Large Hadron Collider (LHC) accelerates and collides protons, and also heavy lead ions. The “A Toroidal LHC Apparatus” (ATLAS) is one of two general purpose detectors used for detecting the sub-atomic particles produced during these high-energy collisions. The Tile Calorimeter (TileCal) is the central hadronic calorimeter of the ATLAS detector. The year 2022 has been scheduled to see an upgrade of the LHC in order to increase its instantaneous luminosity. The High Luminosity LHC, also referred to as upgrade Phase-II, means an inevitable complete re-design of the read-out electronics in the TileCal. The completed new read-out architecture is expected to have the front-end electronics transmit full digitized information of the full detector to the back-end electronics system. The back-end system will, thus, provide digital calibrated information with greater precision and granurality to the first level trigger, thereby resulting in improved trigger efficiencies. An evaluation of this new proposed architecture will be carried out in the demonstrator project in 2014, where a small fraction of the detector (1/256) will be used in real conditions. In Phase II, the current Mobidick4 test bench will be replaced by the next generation test bench for the TileCal super-drawers, the new Prometeo (A Portable ReadOut ModulE for Tilecal ElectrOnics). The Prometeo is designed to certificate the TileCal front-end electronics by performing multiple tests. Its main board is a V707 evaluation board mounted with a QSFP board. The Prometeo’s prototype has been designed and assembled by the University of the Witwatersrand and installed at CERN for further developing, tuning and tests. A presentation will be made of the design of the Prometeo, with particular emphasis on its firmware development.

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Primary author

Mr Chamunorwa Oscar Kureba (University of the Witwatersrand)


Prof. Bruce Mellado (University of the Witwatersrand)

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