Speaker
Main supervisor (name and email)<br>and his / her institution
Prof. Bruce Mellado, bruce.mellado.garcia@cern.ch, WITS
Abstract content <br> (Max 300 words)<br><a href="http://events.saip.org.za/getFile.py/access?resId=0&materialId=0&confId=34" target="_blank">Formatting &<br>Special chars</a>
The Large Hadron Collider (LHC) is preparing for the Phase-II upgrade that is scheduled for 2022. The ATLAS Tile hadron Calorimeter (TileCal) will have both its front- and back-end electronics systems completely redesigned. The PROMETEO (A Portable ReadOut ModulE for Tilecal ElectrOnics) standalone test-bench system is being developed for full certification and quality checks of the new TileCal Front-end electronics. PROMETEO is designed to read in digitised samples from 16 channels coming from the front-end electronics at the bunch crossing frequency. The data quality of these samples needs to be assessed in real-time using FPGAs. The PROMETEO uses a Xilinx VC707 evaluation board with a dual QSFP+ FMC module for the read-out and control of the frond-end. Several other functions of the test-bench are provided by a High voltage board, LED board and a FMC ADC daughter board. The ADC board digitises differential analog trigger signals from the front-end adder boards. The board uses two ASC571 ADC chips to sample 16 analog data channels at 40 Mega Samples Per Second (MSPS) leading to a data flow of 7860 Mbps. This paper relates to the development and testing of the FMC ADC board that is being developed for the PROMETEO test-bench.
Apply to be<br> considered for a student <br> award (Yes / No)?
yes
Would you like to <br> submit a short paper <br> for the Conference <br> Proceedings (Yes / No)?
yes
Please indicate whether<br>this abstract may be<br>published online<br>(Yes / No)
yes
Level for award<br> (Hons, MSc, <br> PhD, N/A)?
MSc
