4-8 July 2016
Kramer Law building
Africa/Johannesburg timezone
<a href="http://events.saip.org.za/internalPage.py?pageId=10&confId=86">The Proceedings of SAIP2016</a> published on 24 December 2017

ADC trigger board for the PROMETEO test-bench of the ATLAS Tile Calorimeter

6 Jul 2016, 11:10
20m
4B (Kramer Law building)

4B

Kramer Law building

UCT Middle Campus Cape Town
Oral Presentation Track F - Applied Physics Applied Physics (1)

Speaker

Mr Matthew Spoor (WITS)

Apply to be<br> considered for a student <br> &nbsp; award (Yes / No)?

yes

Level for award<br>&nbsp;(Hons, MSc, <br> &nbsp; PhD, N/A)?

MSc

Would you like to <br> submit a short paper <br> for the Conference <br> Proceedings (Yes / No)?

yes

Main supervisor (name and email)<br>and his / her institution

Bruce.Mellado@wits.ac.za

Please indicate whether<br>this abstract may be<br>published online<br>(Yes / No)

yes

Abstract content <br> &nbsp; (Max 300 words)<br><a href="http://events.saip.org.za/getFile.py/access?resId=0&materialId=0&confId=34" target="_blank">Formatting &<br>Special chars</a>

The implementation of the High luminosity upgrade of the ATLAS Tile Calorimeter (TileCal) is planned 2026. The TileCal will have both its on- and off-detector electronics completely redesigned and replaced. A Hybrid demonstrator is currently being developed to test the new upgrade architecture while providing backwards compatibility with current legacy systems. The PROMETEO (A Portable ReadOut ModulE for Tilecal ElectrOnics) standalone test-bench system has been in development in parallel with the demonstrator. The test-bench will serve as a tool to perform functionality checks as well as fully certify the new TileCal electronics. By reading out digital and analog samples from the front-end electronics in real time, data quality can be assessed and system malfunctions can be diagnosed. PROMETEO is currently based around a Xilinx VC707 evaluation board with a dual QSFP+ FMC module for high speed readout. Additional functions are provided by a multiple custom boards: ADC trigger board, LED board and High voltage board. This work focuses on the development of the ADC trigger board which is used to digitise differential analog trigger signals coming from the adder boards on the front-end of TileCal. The ADC board employs two ADC5271 chips to sample 16 analog data channels at 40 Mega Samples Per Second (MSPS) leading to a data flow of 7.86Gbps to a FPGA on the VC707.

Primary author

Mr Matthew Spoor (WITS)

Co-author

Dr Chamunorwa Oscar Kureba (School of Physics, University of the Witwatersrand, Johannesburg 2050, South Africa)

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