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Developing the high data-throughput ADC daughter board of the PROMETEO test-bench for the upgrade of the ATLAS Tile Calorimeter

Presented by Mr. Matthew SPOOR on 2 Jul 2015 from 10:00 to 10:20
Type: Oral Presentation
Session: NPRP
Track: Track B - Nuclear, Particle and Radiation Physics

Abstract

The Large Hadron Collider (LHC) is preparing for the Phase-II upgrade that is scheduled for 2022. The ATLAS Tile hadron Calorimeter (TileCal) will have both its front- and back-end electronics systems completely redesigned. The PROMETEO (A Portable ReadOut ModulE for Tilecal ElectrOnics) standalone test-bench system is being developed for full certification and quality checks of the new TileCal Front-end electronics. PROMETEO is designed to read in digitised samples from 16 channels coming from the front-end electronics at the bunch crossing frequency. The data quality of these samples needs to be assessed in real-time using FPGAs. The PROMETEO uses a Xilinx VC707 evaluation board with a dual QSFP+ FMC module for the read-out and control of the frond-end. Several other functions of the test-bench are provided by a High voltage board, LED board and a FMC ADC daughter board. The ADC board digitises differential analog trigger signals from the front-end adder boards. The board uses two ASC571 ADC chips to sample 16 analog data channels at 40 Mega Samples Per Second (MSPS) leading to a data flow of 7860 Mbps. This paper relates to the development and testing of the FMC ADC board that is being developed for the PROMETEO test-bench.

Award

yes

Level

MSc

Supervisor

Prof. Bruce Mellado, bruce.mellado.garcia@cern.ch, WITS

Paper

yes

Permission

yes

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Co-authors

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